Digital Controllers operate by periodically sampling an analog signal, processing the sampled signal in some fashion and then outputting a control command value, which is converted to an analog signal. The control command value is typically output at the same periodic rate as the analog input signal is sampled. The output analog signal is analogous to a staircase where the width of a stair is compared to the period of the sample and the height of the stair is compared to the change in the signal from the last output to the current output. The width of the stair defines the period (frequency) of the digital noise that must be filtered and the maximum stair height defines the amplitude of the digital noise that must be filtered in order to recover a smooth output signal. However, filtering the signal typically introduces delay into the output signal. Generally, the lower the frequency of the digital noise the more delay the filter will introduce. Similarly, the larger the amplitude of the digital noise, the more delay the filter will introduce.
At least some known digital approaches provide an integrated approach to the electronic solution, however the sample rate is typically limited by considerations such as available computational bandwidth. Other known traditional digital solutions insert additional noise into the control system that must be filtered, which in turns introduces additional delays.
If the total delay in the command path becomes too large, the control process can become unstable. And, if the noise is insufficiently filtered, the noise pulses introduced can cause performance problems of the digital controller
Therefore, it would be highly desirable to reduce the noise and delay in digital control systems, in order to maintain controllability, without adding significant costs.